Input/output controller for independently supervising a plurality of operations in response to a single command

ABSTRACT

IN ORDER TO INCREASE THE THROUGHOUT OF AN INPUT-OUTPUT CONTROLLER WITHIN A MODULAR DATA PROCESSING SYSTEM, APPARATUS IS PROVIDED WITHIN THE INPUT-OUTPUT CONTROLLER RESPONSIVE TO A SINGLE COMMAND TO SUPERVISE THE TRANSFER OF INFORMATION BETWEEN A PERIPHERAL SUBSYSTEM AND A MEMORY, DURING WHICH TRANSFER A PLURALITY OF RECORDS ARE AFFECTED IN RESPONSE TO THE   SINGLE COMMAND RATHER THAN A CORRESPONDING PLURALITY OF COMMANDS.

United States Patent inventors John W. Figueroa Palo Alto, Calif.; William J. Morgan. Phoenix, Ariz.; Rolland R. Rasmussen, Ridgecrest, Calif.

Appl. No. 775,448

Filed Nov. 13, 1968 Patented June 28, i971 Assignee Honeywell lnlormation Systems Inc.

INPUT/OUTPUT CONTROLLER FOR INDEPENDENTLY SUPERVISING A PLURALITY OF OPERATIONS IN RESPONSE TO A SINGLE COMMAND 21 Claims, 57 Drawing Figs.

[15. Cl 340/1715 Int. Cl G06! 3/00, G06f 9/00 Field of Search 340/1726; 235/157 Primary Examiner-Gareth D. Shaw Attorneys-James A. Pershon, Edward W. Hughes, George V.

Eltgroth, O. B. Waddell, Frank L. Neuhauser and Joseph B. Forman ABSTRACT: in order to increase the throughput of an input/output controller within a modular data processing system, apparatus is provided within the input/output controller responsive to a single command to supervise the transfer of information between a peripheral subsystem and a memory, during which transfer a plurality of records are affected in response to the single command rather than a corresponding plurality of commands.

PROCE SSOR MEMORY CONTROLLER ORY MEMORY INPUT/OUTPUT CONTROLLER PATENTEU JUN28 m.

MEMORY SHEET PROCESSOR MEMORY CONTROLLER MEMORY INPUT/OUTPUT CONTROLLER INVENTORS.

WILLIAM J. MORGAN JOHN W. FIGUEROA ROLLAND R. RASMUSSEN ATTORNEY PATENTEU 3,588,831

SHEET 02 HF 52 pnocssson MEMORY MEMORY A MEMORY CONTROLLER CONTROLLER MEMORY /7 1/0 00m. f 1/0 com.

FIE-E R ZONE ACTION T ADDRESS CONTROL, CODE WORD COUNT xxxxxxxxxxxxxxxxx -ANYMEMORYADDRESS o o o -FULLWORD o o I 0NE CHARACTER IN woRo o I 0 TWO CHARACTERS IN WORD o l I -T EE CHARACTERS IN WORD I o o R CHARACTERS IN R0 I 0 I -FIVE CHARACTERS IN RD l -REA0 o -WRITE o 0 DATA TRANSFE ND STOP 0 I TA TRANSFE ND PRocEEo l o -0cw BRANCH SECONDARY MAILBOX I I NO DATA TRANSFER AND PROCEED WORD I oooooooooooo -4o9s woRos oooooooooooI -v({)gD BIB-5E oo ooooooooIo TWO WORDS oooooooooo I l -THREE WORDS ETC 35 Ia,I1 IO,9,8 0

NEXT DATA CONTROL LowER uPPER WORD (new) POINTER ADDRESS LIMIT ADDRESS LIMIT SECONDARY MA/LBOX WORD 2 32:15.. 5d

35 30,29 24,23 20,l9,I8 I2,I I 0 6,5 PERIPHERAL PERIPHERAL PERIPHERAL Q DEVICE DEVICE CHANNEL 3'7 ini Q'Z COMMAND ADDRESS ADDRESS 0 x (IMAGE OF PRIMARY MAILBOX WORD) FOR MULTICOMMAND. DEFINES SECOND OPERATI FOR ALL OTHER IOC COMMANDS, IMAGE OF PRI RY MAILBOX WORD SECONDARY MAILBOX WORD 3 E5. 58'

PATENTED JUH28 m7:

SHEET 09 0F 52 m mH 9K9: kmbttw t tQttm QMRZDOU .MDMDO mommu muhZDOo mommm mmkZDOu OZ O n- 2 w PATENTEUJUNZBIBYI 8588.881

SHEET 10 0F 52 42 1 6/ A A,8,c,ORO z 60 l f .4

INFORMATION SIGNAL JAOO INFORMATION SIGNAL JAOI I INFORMATION SIGNAL JAOZ 7 INFORMATION SIGNAL JA'ss ILLEGAL AcTION SIGNAL JAAA V l ILLEGAL ACTIQN IG A JAAB I I ILLEGAL ACTION SIGNAL JAAC I DATA AVAILABLE /STOREO SIGNAL JADS V l ILLEGAL AcTION CODE i AVAILABLE SIGNAL JAAS,

cONNEcT SIGNAL JACS INFORMATION SIGNAL RAOO INFORMATION SIGNAL RAOI INFORMATION SIGNAL RAO2 5 S MEMORY MEMORY L S'GNAL PORT A IOOMMUNIOATIONS CONTROLLER ADDRESS SIGNAL RALA UNIT ADDRESS SIGNAL RALB l AOORESS SIGNAL RALC l ADDRESS SIGNAL RALT ZONE SIGNAL RALI zONE SIGNAL RAL4 l ZONE SIGNAL RAzO ZONE SIGNAL RA'zs I COMMAND SIGNAL RAcA COMMAND SIGNAL RACB OOMMANO SIGNAL RACC COMMAND SIGNAL RAOO PROTECT SIGNAL RAPR MEMORY ACCESS INTERRuPT I REQUEST SIGNAL RALS i MEMORY C ON TROI I ER INPUT/0U TPU T CONTROLLER CONNECTION PATENIfinJuneslsn 3,688,831

sum 12 or 52 RALS n RAPR RAOO-RA35 RALA-RALT RALI RAZ5 L RACA-RACD JAOO-JA35 I L JAAA- JAAC JADS n JAAS FL JACS FRGR

FBUS

READ/ RES TORE COMMAND ICE. 5

PATENTEU JUH28|971 RALQ RAPR

RAOO-RA35 RALA-RALT RALI RAZ5 RACA-RACD JAOO-JA35 JAAA- JAAC JADS JAAS

JACS

FRGR

FBUS

SHEET 13 0F 52 PATENTfinJunzalsn 3,588,831

sum 1m? 52 COUNTER RITY INTERRUPT i i fi'fi. .E TEESJPT T Z TERMINA INTERRUPT MEMORY MEMO INTERRUPT I RE TER BITS W I C S I T REGISTER 0 33 1'3 '5 g I 2 2? 19 3 FIE-5- l U 3 25 I7 9 RALS n RAPR RAOO-RA35 l RALA-RALT l RALI RAZ5 RACA-RACD 1 M00 was I 1 JAAA-JAAC L JADS n JAAS H .mcs

FRGR 1 FBUS L.

$Eoc H SET EXECUTE INTERRUPT CELLS COMMAND IIE- ll 

